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Courses overview for SoC 2006 - 2008
Click on the dates below the periods to see which courses
are given!
For detailed time schedule, please go to school's "time-table generator"
Note: During Periods I and II only mandatory courses
are allowed. One exception is the analog electronics in
the C&R track which spans over Periods II and III.
Course
overview for SoC 2007/2007 (Requires Acrobat Reader)
We propose two tracks in the program:
System & Architecture (S&A)
Circuits & Radio (C&R) |
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Click course shown in the table and get the corresponding course description!
Click course shown in the table and get the corresponding course description!
Click course shown in the table and get the corresponding course description!
Click course shown in the table and get the corresponding course description!
Click course shown in the table and get the corresponding course description!
Click course shown in the table and get the corresponding course description!
Click course shown in the table and get the corresponding course description!
>> Digital Design with HDL -- 5 pt, period I, Mandatory Course
Introduction to general system design flow and implementation techniques. Introduction to hardware description languages (HDLs). VHDL. The synthesisable subset. Alternative HDLs. System modelling using VHDL. Design and analysis of combinational and sequential components. Implementation architectures. Synthesis towards FPGAs. Asynchronous vs. Synchronous Finite State Machines (FSMs). Micro controllers/processors and data busses.
Course code: 2B1513
Course page in Studiehandboken
Course responsible: Johnny Öberg
Track: S & A and C & R
>> Design of Digital Integrated Circuits - VLSI -- 5pt, period III-IV, Elective Course
The course is intended to give the student an understanding of the fundamental system level electrical issues involved in the design of digital deep submicron CMOS VLSI systems and a mastery of the basic techniques and methods used to deal with these issues. The key focus in this course is on impact of interconnects (metal Al or Cu wires) to circuit and system properties. Issues related to interconnects will be introduced in the areas of power distribution, signalling, timing, synchronization, noise-management, and related chip power consumption minimization. In each area, the fundamental problems will be introduced and engineering architecture and circuit solutions to these problems discussed. The above-mentioned issues will define how price and performance competitive and reliable the designed VLSI circuits and related end-product systems will be for the end user.
Deep submicron phenomena. Interconnect scaling and interconnectivity constraints. Interconnects on silicon. Noise in digital systems and noise budgeting. Crosstalk. Power distribution design. Signalling conventions. Noise immunity vs. Noise margin. On-chip and off-chip signalling strategies. Timing fundamentals. Timing uncertainty. Synchronous and pipelined timing conventions. Clock distribution strategies. Signalling and timing circuits. Power optimization in signalling and timing.
Course code: 2B1428
Course page in Studiehandboken
Course responsible: L-R. Zheng
Track: C & R
>> Design of fault tolerant systems -- 5pt, period IV, Elective Course
The objective of the course is to teach the students the principles testability and of design of fault-tolerant SoC systems. Fault tolerance is the ability of a system to continue performing its intended function despite of faults. In a broad sense, fault tolerance is associated with reliability, with successful operation, and with the absence of breakdowns.
The ultimate goal of fault tolerance is the development of a dependable system. As computer systems become relied upon by society more and more, dependability of these systems becomes a critical issue. In airplanes, chemical plants, heart pace-makers or other safety critical applications, a system failure can cost people's lives or environmental disaster.
There are various approaches to achieve fault-tolerance. Common to all these approaches is a certain amount of redundancy. This can a replicated hardware component, an additional check bit attached to a string of digital data, or a few lines of program code verifying the correctness of the program's results. In this course, we are going to study hardware as well and software fault tolerance. The rapid development of real-time computing applications that started around the mid-1990s, especially the demand for software-embedded intelligent devices, made software fault tolerance a pressing issue.
Course code: 2B1454
Course page in Studiehandboken
Course responsible: E. Dubrova
Track: S & A
>> Design Project I -- 5 pt, period VI, Mandatory Course
In the course the students shall in teams of 4-5 persons conduct a design project. The aims for the students are:
- To put the knowledge acquired in previous courses into concrete praxis;
- Learn to use the complicated CAD tools in more detail;
- Conduct a project in a systematic way from requirements definition to design and verification;
- To be introduced to a research group as preparation for the master thesis.
The course is synchronized closely with the Design Project II course, which focuses on design and research methodology and oral and verbal communication skills.
Courses Design Project I and II can only be taken together.
The design projects will be offered, defined and supervised by staff members at LECS and are expected to be related to research activities and other courses given in the program. Thus, the course coordinators are responsible for the overall course and its operation but not for providing and supervising the design projects.
Course code: 2B1471
Course page in Studiehandboken
Course responsible: J. Öberg and A. Rusu
Track: S & A and C & R
>> Design Project II -- 5 pt, period VI, Mandatory Course
The course is taken together with the Design Project Course I and focuses on
- Planning, conducting and analysing experiments;
- Oral and written communication skills; the student is expected to deliver several reports and seminars.
Drawing on the experience from the IT project courses it is planned to run the course in cooperation with the KTH language department, which takes care of language and communication skills, and 2IT which takes care of project methodology.
Course code: 2B1472
Course page in Studiehandboken
Course responsible: J. Öberg and A. Rusu
Track: S & A and C & R
>> Distributed Systems Basics -- 5pt, period I or V, Elective Course
The course discusses basic concepts and methods in distributed systems. The course leads to deep understanding of basic concepts, principles and methods in distributed systems. The course covers IPC , distributed synchronization, consistency, replication, fault tolerance, security, distributed object based systems, distributed file systems, and distributed coordination systems.
Course code: 2G1509
Course page in Studiehandboken
Course responsible: C. Schulte
Track: S & A
>> DSP Design with HDL-- 5pt, period III, Elective Course
The course covers hardware design of signal processing algorithms, based on VHDL and state of the art synthesis tools.
Course code: 2B1435
Course page in Studiehandboken
Course responsible: J. Öberg and S. Signell
Track: S & A and C & R
>> Embedded Software and RTOS -- 5pt, period III, Elective Course
The course discusses the software design process for embedded systems. Embedded software is usually organized in layers from hardware dependent parts to application specific software modules. Lower software layers provide hardware abstraction, communication and resource management services to the higher application specific software layers.
Due to the nature of embedded systems, all embedded software has to handle strict non-functional constraints such as delay and throughput constraints, power constraints, and memory constraints.
Course code: 2B1463
Course page in Studiehandboken
Course responsible: Ingo Sander
Track: S & A
>> Embedded systems-- 5 pt, period I, Mandatory Course
After the course the students shall
- have good knowledge of the special requirements which are imposed on embedded systems
- understand how microcontroller or digital signal processor can be used to the advantage of the embedded system
- be able to design a system where a microprocessor is used as the main component " have knowledge of the architecture for microprocessor based embedded systems, including peripheral components, memory and bus system
- have knowledge how architectural and implementation decisions influence performance and power efficiency
- have basic knowledge of the concurrent process model and real-time operating systems
Course code: 2B1446
Course page in Studiehandboken
Course responsible: Ingo Sander
Track: S & A and C & R
>> Engineering of Embedded Systems--
5pt, period V, Elective Course
The course focuses on design methodology of embedded systems covering system level specification, requirements definition, architecture design, validation methodology, and HW/SW codesign methodology.
Course responsible: A. Hemani
Track: S & A
>> Low Power Analog and Mixed Signal ICs -- 5pt, period IV, Elective Course
Students will be introduced to low voltage low power design techniques for analog and mixed signal CMOS IC?s. Topics include CMOS OpApms, comparators, sample and hold circuits, switched capacitor circuits, Nyquist and oversampling converters, continuous time filters, physical design issues and layout techniques.
Learn basic design concepts for low power mixed signal VLSI circuits in MOS technology. It is assumed that the student prior to the course has basic knowledge of transistor models, biasing techniques, familiarity with IC fabrication and use of circuit simulation tools such as SPICE.
Course code: 2B1611
Course page in Studiehandboken
Course responsible: M. Ismail
Track: C & R
>> Nanosystems-- 5pt, period VI, Elective Course
The course focuses on the challenge to build dependable and predictable systems based on subsystems and components having strong stochastic nature in their parameters and performance. This stochastic variations can be due to process induced variability or even architecture and system depend stochastic associated e.g. to packet switched communication links on-chip. The course is organized in five thematic areas: technology development and roadmapping, parallel platforms, algorithm design and mapping, reconfigurability and system management. Each of the topics is covered by 2-3 lectures. Four obligatory exercises are used to convey the course objectives. More detailed studies of course topics will be presented in seminars by students. Students have to both complete exercises and keep a seminar to pass the course.
Course responsible: H. Tenhunen
Track: C & R
>> Philosophy of Science -- 5 pt, period V, Mandatory Course
This course focuses on a generic research philosophy and methodology and will be given by the Philosophy Unit at KTH.
Course code:
Course page
Course responsible: John Cantwell
Track: S & A and C & R
>> Radio electronics - 5pt, period IV, Elective Course
This course aims at familiarizing the student with modern radio electronic devices, circuits and systems and to provide a relevant background to the common mobile applications standards of today. A focus will be put on knowledge of integrated radio circuit building blocks so that at the student at end of the course is well equipped to pursue either an industrial or academic career in the area. The course will prepare the student for diploma thesis work in the area of Radio Electronics, as he will be further trained in circuit design beyond the knowledge gained in analog courses. The most important CMOS and bipolar techniques for low power applications will be studied for radio applications and modern design tools will be used.
Course code: 2B1600
Course page in Studiehandboken
Course responsible: H. Olsson
Track: C & R
>> Research Methods and Scientific Writing-- 2pt, period V, Elective Course
The objective of the course is to provide the student of the International Masters Programmes, with a brief overview of research methodology and report writing. This overview will enable the student to make informed choices concerning the planning and writing of the Masters thesis.
The course will provide a brief orientation in at least the following subjects:
- Principles of science and research
- Thesis structure, format and report writing
- Problem definition
- Common thesis types
- Four levels of method and choosing a research method
- Finding and using literature
Course code: 2I1407
Course page in Studiehandboken
Course responsible: Danny Brash
Track: S & A and C & R
>> SoC Applications--
5pt, period IV, Elective Course
This course aims to provide students a front-line view of system-on-chip (SoC) design and implementation through many application examples in industrial practice. Key technological trends and challenges in real SoC applications will be analyzed and how these challenges are solved will be demonstrated. Through these SoC application examples, students are expected to have a better understanding of basic theory and design methods gained in other VLSI and SoC design courses, to develop basic skills on how to use a divergence of SoC design knowledge in SoC design practice.
Course code: 2B1459
Course page in Studiehandboken
Course responsible: L-R. Zheng
Track: S & A and C & R
>> SoC Architectures -- 5 pt, period II, Mandatory Course
Advances in process technologies allow to integrate more and more components on a single chip, which allows the design of very powerful applications. The course aims to give the student a good understanding of the interaction between different components in order to be able to design efficient applications.
Course code: 2B1448
Course page in Studiehandboken
Course responsible: Ingo Sander
Track: S & A and C & R
>> System Modelling -- 5pt, period III, Elective Course
The theme of the course is system modelling. Since modelling is an indispensable technique and serves various purposes, it is important to understand the fundamental concepts. These are discussed in relation to the most important applications of modelling, namely functional specification, performance analysis, design and synthesis, and validation.
Course code: 2B1429
Course page in Studiehandboken
Course responsible: A. Jantsch
Track: S & A
>> Validation -- 5
pt, period IV, Mandatory Course
The course will focus on validation of embedded systems and SoCs and it will cover
- Validation methodology
- Formal verification techniques (equivalence checking, model checking, theorem proving)
- Testbench design
- Assertion based techniques
Course responsible: Ahmed Hemani
Track: S & A
>> Advanced Logic Design -- 5pt, period III, Elective Course
The design paradigm of how to build chips in the coming technologies will be changing due to the underlying technology changes with emphasis placed on different objectives of the synthesis and different sources affecting parameters like delay, communication, and power. In addition, larger systems will offer additional complexity and a shift to core based designs will be one way of coping with this. This brings the need for new, non-standard approaches to system design.
This course will in-depth course, covering the basics of theory and algorithms for computer-aided design. Some non-traditional techniques will also be presented and their application to the design of the next generation systems will be discussed.
Course code: 2B1456
Course page in Studiehandboken
Course responsible: E. Dubrova
Track: S & A
>> Electronic Systems Packaging
-- 5pt, period III, Elective Course
The objective of this course is to provide a coherent and pragmatic overview of relevant issues of physical architecture design of complex electronic system presented in such way that practicing electronics designers can communicate with experts in other fields and extract relevant design data for circuit and system design.
This course provides a unified view of physical architecture of electronic systems from chip to cabinet via focus to interconnectivity and interconnections and their impact to performance and signal integrity and signal couplings. Our aim is to provide a coherent and pragmatic view for understanding the system performance constraints and their dependencies of the underlying technologies in order to define physical architecture of mixed signal systems. During the course we will
Summarize the key interconnection technologies from chip to system with focus on the underlying principles and new technologies which will remain the basic for electronic design and manufacturing through the next decade
Emphasize the interaction of chip and higher packaging level technologies for mixed signal system electrical design and system partitioning to different packaging technologies
Analyse systematically the key electrical phenomena at chip, package and interconnection substrate levels defining the system signal integrity and robustness properties in order to define the future constraints to integration for communication and consumer electronic products.
Emphasize the impact of deep sub micron CMOS technologies to system partitioning and packaging technologies.
Introduce the early conceptual design for partitioning of the complex system to different packaging and interconnect hierarchies.
Course code: 2B1450
Course page in Studiehandboken
Course responsible: L-R. Zheng
Track: C & R
>> Advanced Topics in Mixed-Mode Design-- 5pt, period V, Elective Course
Content: This course aims at familiarizing the student with professional computer simulation tools for mixed-signal circuits and systems and to provide relevant skills in circuit modeling, simulation and analysis.
Gain experience with system level design flow: top-down and bottom-up design methodologies.
Gain extensive experience in mixed-mode CAD tools
Course Organization: The course includes a lecture component (40%) and a lab/project component (60%).
Topics:
Top-down and bottom-up, constraint-driven design methodologies
High-Level Design and Optimization
Behavioral modeling and simulation
Macromodeling Algorithms for Analog Circuits
Multilevel and Mixed-Domain Simulation of Analog Circuits and Systems
Development of AHDL macro models
Moving from AHDL to device implementation
Computer-Aided Design Considerations for Mixed-Signal Coupling
Behavioral Simulation for Analog and Mixed-Signal System Design Verification
Functional verification
Floorplanning and physical implementation
Layout Tools for Analog ICs and Mixed-Signal SoCs
Simulation Methods for RF Integrated Circuits
Examples of Mixed-Mode Circuits for SoC platforms
Course code: 2B1670
Course page in Studiehandboken
Course responsible: A. Rusu
Track: C & R
>> Analog Electronics -- 5pt, period II-III or VI-VII, Elective Course
The course content is a deeper treatment of analog circuits and the basics of analog design. The aim is to analyze and design the basic building blocks of an operational amplifier and to understand how to merge the necessary blocks in order to form an operational amplifier with the use of frequency response and feedback.
The analysis of the following blocks in bipolar and MOS: Single and multi-stage amplifiers, current mirrors, output stages, operational amplifiers. Frequency response of amplifiers, feedback theory.
Note: This course is eligible for selection of C&R students,
even no elective course are allowed in the first semester.
Course code: 2B1515
Course page in Studiehandboken
Course responsible: S. Signell
Track: C & R
>> Applied Signal Processing-- 5pt, period IV, Elective Course
This course will focus on application oriented signal processing, in particular analog and digital filters, applied signal processing including understanding how an algorithm is refined from Matlab to implementation. Examples of topics are finite wordlength effects, digital noise, algorithm sensitivity to quantization, statitical effects of quantization, co-design of SW and HW for a given algorithm etc.
Course code: 2B1436
Course page in Studiehandboken
Course responsible: S. Signell
Track: S & A and C & R
>> ASIC Design Methodology -- 5 pt, period II, Mandatory Course
The aim of the course is to teach important concepts and methods related to design, testing and implementation of digital ASICs and FPGAs. The design process starts from a behavioral or structural description in VHDL. The main focus lies on synthesis from the register transfer level, but will also discuss formal verification, design for testability, technology mapping and physical layout issues
Course code: 2B1423
Course page in Studiehandboken
Course responsible: Johnny Öberg
Track: S & A and C & R
>> Compilers and Virtual Machines-- 5pt, period II or VI, Elective Course
The course covers techniques for the implementation of mainly conventional programming languages using compilers and virtual machines. It also gives a deeper understanding of programming languages and an example of the design of large programs.
After the course, the students will understand how a programming language is implemented and have an understanding of the theories in the area. The students will also have an understanding of how different features of a programming language influence the choice of implementation technology as well as of the influence of the properties of the target machine. In addition the students will have an idea of how for example parsing techniques can be used in other areas. Finally, the students will see how compilers can be designed and implemented.
Reading a program: Lexical and syntactic analysis. State machines, regular expressions, LR-parsing. Understanding a program: Semantic analysis, type checking. Scope control, declarations and expressions. Types and type systems. Translating a program: Virtual machines and run-time systems. Stacks and procedure calls, machine level types, memory management. Interpretation and Just-in-time compilation. Improving a program: Optimization. Machine independent optimizations (common sub expressions, constant propagation, ...) Machine level optimization (register allocation, scheduling,...) Writing a compiler: Compiler design, intermediate languages, type centered design.
Course code: 2G1508
Course page in Studiehandboken
Course responsible: C. Schulte
Track: S & A
>> Computer System Architecture -- 5pt, period
V, Elective Course
Intermediate-to-advanced course on
computer architecture.
Topics include the following. Instruction-level parallelism,
with software and hardware methods for exploiting it.
Basic thread-level parallelism and methods for exploiting it.
Memory hierarchies, including memory management hardware and
memory protection hardware, shared memory and cache coherence.
Prerequisites: knowledge of microprocessor internals, addressing
modes,
computer arithmetic, low-level programming, parameter passing,
buses, input/output, polling, interrupts, direct memory access,
pipelining and caches.
Course code: 2G1534
Course page in Studiehandboken
Course responsible:
F. Lundevall and M. Brorsson
Track: S & A
>> Thesis -- 20 pt, after period VI, Mandatory Course
A 20 creadits, 5 months full time project concludes your
studies and allows you to apply your freshly gained theoretical
knowledge and practical design skills in a complete project that
you can conduct either in industry or at a University, either in
Sweden or abroad.
Course info:
Master's project
Track: S & A and C & R
>> Digital Design with HDL -- 5 pt, period I, Mandatory Course
Introduction to general system design flow and implementation techniques. Introduction to hardware description languages (HDLs). VHDL. The synthesisable subset. Alternative HDLs. System modelling using VHDL. Design and analysis of combinational and sequential components. Implementation architectures. Synthesis towards FPGAs. Asynchronous vs. Synchronous Finite State Machines (FSMs). Micro controllers/processors and data busses.
Course code: 2B1513
Course page in Studiehandboken
Course responsible: Johnny Öberg
Track: S & A and C & R
>> Design of Digital Integrated Circuits - VLSI -- 5pt, period III-IV, Elective Course
The course is intended to give the student an understanding of the fundamental system level electrical issues involved in the design of digital deep submicron CMOS VLSI systems and a mastery of the basic techniques and methods used to deal with these issues. The key focus in this course is on impact of interconnects (metal Al or Cu wires) to circuit and system properties. Issues related to interconnects will be introduced in the areas of power distribution, signalling, timing, synchronization, noise-management, and related chip power consumption minimization. In each area, the fundamental problems will be introduced and engineering architecture and circuit solutions to these problems discussed. The above-mentioned issues will define how price and performance competitive and reliable the designed VLSI circuits and related end-product systems will be for the end user.
Deep submicron phenomena. Interconnect scaling and interconnectivity constraints. Interconnects on silicon. Noise in digital systems and noise budgeting. Crosstalk. Power distribution design. Signalling conventions. Noise immunity vs. Noise margin. On-chip and off-chip signalling strategies. Timing fundamentals. Timing uncertainty. Synchronous and pipelined timing conventions. Clock distribution strategies. Signalling and timing circuits. Power optimization in signalling and timing.
Course code: 2B1428
Course page in Studiehandboken
Course responsible: L-R. Zheng
Track: C & R
>> Design of fault tolerant systems -- 5pt, period IV, Elective Course
The objective of the course is to teach the students the principles testability and of design of fault-tolerant SoC systems. Fault tolerance is the ability of a system to continue performing its intended function despite of faults. In a broad sense, fault tolerance is associated with reliability, with successful operation, and with the absence of breakdowns.
The ultimate goal of fault tolerance is the development of a dependable system. As computer systems become relied upon by society more and more, dependability of these systems becomes a critical issue. In airplanes, chemical plants, heart pace-makers or other safety critical applications, a system failure can cost people's lives or environmental disaster.
There are various approaches to achieve fault-tolerance. Common to all these approaches is a certain amount of redundancy. This can a replicated hardware component, an additional check bit attached to a string of digital data, or a few lines of program code verifying the correctness of the program's results. In this course, we are going to study hardware as well and software fault tolerance. The rapid development of real-time computing applications that started around the mid-1990s, especially the demand for software-embedded intelligent devices, made software fault tolerance a pressing issue.
Course code: 2B1454
Course page in Studiehandboken
Course responsible: E. Dubrova
Track: S & A
>> Design Project I -- 5 pt, period VI, Mandatory Course
In the course the students shall in teams of 4-5 persons conduct a design project. The aims for the students are:
- To put the knowledge acquired in previous courses into concrete praxis;
- Learn to use the complicated CAD tools in more detail;
- Conduct a project in a systematic way from requirements definition to design and verification;
- To be introduced to a research group as preparation for the master thesis.
The course is synchronized closely with the Design Project II course, which focuses on design and research methodology and oral and verbal communication skills.
Courses Design Project I and II can only be taken together.
The design projects will be offered, defined and supervised by staff members at LECS and are expected to be related to research activities and other courses given in the program. Thus, the course coordinators are responsible for the overall course and its operation but not for providing and supervising the design projects.
Course code: 2B1471
Course page in Studiehandboken
Course responsible: J. Öberg and A. Rusu
Track: S & A and C & R
>> Design Project II -- 5 pt, period VI, Mandatory Course
The course is taken together with the Design Project Course I and focuses on
- Planning, conducting and analysing experiments;
- Oral and written communication skills; the student is expected to deliver several reports and seminars.
Drawing on the experience from the IT project courses it is planned to run the course in cooperation with the KTH language department, which takes care of language and communication skills, and 2IT which takes care of project methodology.
Course code: 2B1472
Course page in Studiehandboken
Course responsible: J. Öberg and A. Rusu
Track: S & A and C & R
>> Distributed Systems Basics -- 5pt, period I or V, Elective Course
The course discusses basic concepts and methods in distributed systems. The course leads to deep understanding of basic concepts, principles and methods in distributed systems. The course covers IPC , distributed synchronization, consistency, replication, fault tolerance, security, distributed object based systems, distributed file systems, and distributed coordination systems.
Course code: 2G1509
Course page in Studiehandboken
Course responsible: C. Schulte
Track: S & A
>> DSP Design with HDL-- 5pt, period III, Elective Course
The course covers hardware design of signal processing algorithms, based on VHDL and state of the art synthesis tools.
Course code: 2B1435
Course page in Studiehandboken
Course responsible: J. Öberg and S. Signell
Track: S & A and C & R
>> Embedded Software and RTOS -- 5pt, period III, Elective Course
The course discusses the software design process for embedded systems. Embedded software is usually organized in layers from hardware dependent parts to application specific software modules. Lower software layers provide hardware abstraction, communication and resource management services to the higher application specific software layers.
Due to the nature of embedded systems, all embedded software has to handle strict non-functional constraints such as delay and throughput constraints, power constraints, and memory constraints.
Course code: 2B1463
Course page in Studiehandboken
Course responsible: Ingo Sander
Track: S & A
>> Embedded systems-- 5 pt, period I, Mandatory Course
After the course the students shall
- have good knowledge of the special requirements which are imposed on embedded systems
- understand how microcontroller or digital signal processor can be used to the advantage of the embedded system
- be able to design a system where a microprocessor is used as the main component " have knowledge of the architecture for microprocessor based embedded systems, including peripheral components, memory and bus system
- have knowledge how architectural and implementation decisions influence performance and power efficiency
- have basic knowledge of the concurrent process model and real-time operating systems
Course code: 2B1446
Course page in Studiehandboken
Course responsible: Ingo Sander
Track: S & A and C & R
>> Engineering of Embedded Systems--
5pt, period V, Elective Course
The course focuses on design methodology of embedded systems covering system level specification, requirements definition, architecture design, validation methodology, and HW/SW codesign methodology.
Course responsible: A. Hemani
Track: S & A
>> Low Power Analog and Mixed Signal ICs -- 5pt, period IV, Elective Course
Students will be introduced to low voltage low power design techniques for analog and mixed signal CMOS IC?s. Topics include CMOS OpApms, comparators, sample and hold circuits, switched capacitor circuits, Nyquist and oversampling converters, continuous time filters, physical design issues and layout techniques.
Learn basic design concepts for low power mixed signal VLSI circuits in MOS technology. It is assumed that the student prior to the course has basic knowledge of transistor models, biasing techniques, familiarity with IC fabrication and use of circuit simulation tools such as SPICE.
Course code: 2B1611
Course page in Studiehandboken
Course responsible: M. Ismail
Track: C & R
>> Nanosystems-- 5pt, period VI, Elective Course
The course focuses on the challenge to build dependable and predictable systems based on subsystems and components having strong stochastic nature in their parameters and performance. This stochastic variations can be due to process induced variability or even architecture and system depend stochastic associated e.g. to packet switched communication links on-chip. The course is organized in five thematic areas: technology development and roadmapping, parallel platforms, algorithm design and mapping, reconfigurability and system management. Each of the topics is covered by 2-3 lectures. Four obligatory exercises are used to convey the course objectives. More detailed studies of course topics will be presented in seminars by students. Students have to both complete exercises and keep a seminar to pass the course.
Course responsible: H. Tenhunen
Track: C & R
>> Philosophy of Science -- 5 pt, period V, Mandatory Course
This course focuses on a generic research philosophy and methodology and will be given by the Philosophy Unit at KTH.
Course code:
Course page
Course responsible: John Cantwell
Track: S & A and C & R
>> Radio electronics - 5pt, period IV, Elective Course
This course aims at familiarizing the student with modern radio electronic devices, circuits and systems and to provide a relevant background to the common mobile applications standards of today. A focus will be put on knowledge of integrated radio circuit building blocks so that at the student at end of the course is well equipped to pursue either an industrial or academic career in the area. The course will prepare the student for diploma thesis work in the area of Radio Electronics, as he will be further trained in circuit design beyond the knowledge gained in analog courses. The most important CMOS and bipolar techniques for low power applications will be studied for radio applications and modern design tools will be used.
Course code: 2B1600
Course page in Studiehandboken
Course responsible: H. Olsson
Track: C & R
>> Research Methods and Scientific Writing-- 2pt, period V, Elective Course
The objective of the course is to provide the student of the International Masters Programmes, with a brief overview of research methodology and report writing. This overview will enable the student to make informed choices concerning the planning and writing of the Masters thesis.
The course will provide a brief orientation in at least the following subjects:
- Principles of science and research
- Thesis structure, format and report writing
- Problem definition
- Common thesis types
- Four levels of method and choosing a research method
- Finding and using literature
Course code: 2I1407 Course page in Studiehandboken
Course responsible: Danny Brash
Track: S & A and C & R
>> SoC Applications-- 5pt, period IV, Elective Course
This course aims to provide students a front-line view of system-on-chip (SoC) design and implementation through many application examples in industrial practice. Key technological trends and challenges in real SoC applications will be analyzed and how these challenges are solved will be demonstrated. Through these SoC application examples, students are expected to have a better understanding of basic theory and design methods gained in other VLSI and SoC design courses, to develop basic skills on how to use a divergence of SoC design knowledge in SoC design practice.
Course code: 2B1459
Course page in Studiehandboken
Course responsible: L-R. Zheng
Track: S & A and C & R
>> SoC Architectures -- 5 pt, period II, Mandatory Course
Advances in process technologies allow to integrate more and more components on a single chip, which allows the design of very powerful applications. The course aims to give the student a good understanding of the interaction between different components in order to be able to design efficient applications.
Course code: 2B1448
Course page in Studiehandboken
Course responsible: Ingo Sander
Track: S & A and C & R
>> System Modelling -- 5pt, period III, Elective Course
The theme of the course is system modelling. Since modelling is an indispensable technique and serves various purposes, it is important to understand the fundamental concepts. These are discussed in relation to the most important applications of modelling, namely functional specification, performance analysis, design and synthesis, and validation.
Course code: 2B1429
Course page in Studiehandboken
Course responsible: A. Jantsch
Track: S & A
>> Validation -- 5
pt, period IV, Mandatory Course
The course will focus on validation of embedded systems and SoCs and it will cover
- Validation methodology
- Formal verification techniques (equivalence checking, model checking, theorem proving)
- Testbench design
- Assertion based techniques
Course responsible: Ahmed Hemani
Track: S & A
>> Advanced Logic Design -- 5pt, period III, Elective Course
The design paradigm of how to build chips in the coming technologies will be changing due to the underlying technology changes with emphasis placed on different objectives of the synthesis and different sources affecting parameters like delay, communication, and power. In addition, larger systems will offer additional complexity and a shift to core based designs will be one way of coping with this. This brings the need for new, non-standard approaches to system design.
This course will in-depth course, covering the basics of theory and algorithms for computer-aided design. Some non-traditional techniques will also be presented and their application to the design of the next generation systems will be discussed.
Course code: 2B1456
Course page in Studiehandboken
Course responsible: E. Dubrova
Track: S & A
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